1. Field of the Invention
The invention relates to semiconductor measurements and more particularly to a method and a device for the time measurement of signals at pins or solder pads of semiconductor memory chips.
2. Background of the Invention
In semiconductor memory modules provided with registers, capacitive loads are buffered to a memory sub-channel bus and boosted again. A PLL circuit is used for refreshing a clock signal, while clocked buffer registers are used for refreshing command and address signals (CMD-ADR bus).
In order to maintain proper operation, it must be ensured that a clock signal reaches all parts of a memory module that relate the control of its timing to the system clock in a special time frame, that is, the PLL circuit itself, the registers, and DRAM semiconductor memory chips. For certain DDR memory modules that are operated with a differential clock signal at 133 MHz, the time frame is approximately −100 to +100 ps.
Since Process/Voltage/Temperature (PVT) variations of the parts concerned exert a strong influence on clock jitter of the PLL circuit and the amplification of the driving amplifiers, for each individual memory module the influence of loading of the DRAM semiconductor memory chips and the registers on the cut-off level of the positive and negative clock signals must be measured by a special time measurement technique to ensure that the clock signal arrives within the specified time frame.
In earlier conventional semiconductor chips, the leads or pins of which protrude laterally (for example so-called TSOP chip types), signals for time measurement mentioned above can be derived directly from the pins by means of a suitable measuring probe.
With the increasing operating speed of second generation DRAM memory modules (DDR-II modules), which operate at a clock frequency of up to 266 MHz, the so-called ball-grid-array (BGA) technique has been increasingly employed. The BGA technique produces better characteristic electrical values, including for example, smaller parasitic inductances. This type of chip packaging and contacting is used for PLLs, registers and DRAM chips, where all the pins lie under the chip body itself. In most cases the solder pads of the module (e.g., a DIMM board) that are assigned to the pins are located under the chip body itself, so that they cannot be reached by a measuring probe, or can be reached only with the aid of certain auxiliary measures, for time measurement.
Previously, the following known methods have been employed to overcome these difficulties in the case of modules that are loaded or can be loaded with semiconductor chips using the ball-grid-array technique:
1. On modules that are loaded with components on one side, in which the components are located only on one side of a printed circuit board, access to the signal lines can be ensured by a plated-through hole (via), which leads from a loaded side of the module to the other, unloaded side, and is arranged as close as possible to the terminal (ball) of the semiconductor chip that is to be tested. However, this method has the disadvantage that a mask protecting the plated-through hole has to be removed before the measurement, so that the circuit design has to be split into a measurable part with open plated-through holes, and a part intended for sale with protected plated-through holes. Furthermore, semiconductor modules that are loaded with components on both sides cannot be measured in this way, since they do not have any space for the respective plated-through holes to the other side of the module.
2. On semiconductor modules that are loaded with components on two sides, the layout is supplemented by special test points, which allow the measuring probe to have direct access. These test points must lie as close as possible to the solder pad of the pin concerned (ball) that is to be tested or measured. The disadvantage of this method is that not all relevant signals can be accessed, since very densely loaded modules with an extremely high conductor density do not have the additional space for these test points. Furthermore, the capacitive load is changed by the added test points and the short conductor connections to them.
Tests have shown that the two methods referred to above differ only very little with regard to their measuring accuracy.
3. Another measure employed is that of soldering socket-like measuring adapters between the chip and the semiconductor module. This requires very great effort, and such adapters also appreciably influence the measured values.
4. A final measure employs soldering so-called wire adapters between a signal pin of the semiconductor chip and an assigned solder pad on the semiconductor module. A measuring probe can pick up the signal that is to be measured at the free end of the wire. The wire adapter must have insulation on the underside, so that no unwanted connection to underlying conductor tracks is established. This method has the disadvantage, however, that it cannot be used in the case of all chips on a module and that the heat produced during the soldering often destroys the wire adapter, which makes the entire module unusable.
In view of the foregoing, it will be appreciated that there is a need to further improve time measurements associated with modem semiconductor chip packaging.